Cycle-accurate evaluation of reconfigurable photonic networks-on-chip

There is little doubt that the most important limiting factors of the performance of next-generation Chip Multiprocessors (CMPs) will be the power efficiency and the available communication speed between cores. Photonic Networks-on-Chip (NoCs) have been suggested as a viable route to relieve the off- and on-chip interconnection bottleneck. Low-loss integrated optical waveguides can transport very high-speed data signals over longer distances as compared to on-chip electrical signaling. In addition, with the development of silicon microrings, photonic switches can be integrated to route signals in a data-transparent way. Although several photonic NoC proposals exist, their use is often limited to the communication of large data messages due to a relatively long set-up time of the photonic channels. In this work, we evaluate a reconfigurable photonic NoC in which the topology is adapted automatically (on a microsecond scale) to the evolving traffic situation by use of silicon microrings. To evaluate this system's performance, the proposed architecture has been implemented in a detailed full-system cycle-accurate simulator which is capable of generating realistic workloads and traffic patterns. In addition, a model was developed to estimate the power consumption of the full interconnection network which was compared with other photonic and electrical NoC solutions. We find that our proposed network architecture significantly lowers the average memory access latency (35% reduction) while only generating a modest increase in power consumption (20%), compared to a conventional concentrated mesh electrical signaling approach. When comparing our solution to high-speed circuit-switched photonic NoCs, long photonic channel set-up times can be tolerated which makes our approach directly applicable to current shared-memory CMPs

Improving Food Safety by Using One- and Two-Photon- Induced Fluorescence Spectroscopy for the Detection of Mycotoxins

The presence of mycotoxins in food products is a major worldwide problem. Nowadays, mycotoxins can only be detected by the use of sample-based chemical analyses. Therefore, we demonstrate the use of one- and two-photon-induced fluorescence spectroscopy for the non-destructive detection of mycotoxins in unprocessed food products. We first explain our optical set-up, which is able to measure the localized one- and two-photon-induced fluorescence spectra. Following, as a case study, the detection of aflatoxin in maize kernels is discussed. We present our research methodology, from the characterization of the fluorescence of pure aflatoxin, to the study of the one- and two- photon-induced fluorescence spectra of maize kernels and the development of an optical detection criterion. During both one- and two-photon-induced fluorescence processes, the fluorescence of the aflatoxin influences the intrinsic fluorescence of the maize. Based on the fluorescence spectrum between 400 and 550 nm, a detection criterion to sense the contaminated kernels is defined. Furthermore, we successfully monitored the localized contamination level on the kernel’s surface, showing both contaminated kernels with a high contamination in a limited surface area (a few square millimetres) and kernels with a low contamination spread over a large surface area (up to 20 mm2). Finally, the extensibility of our research methodology to other fluorescent mycotoxins is discussed

Architectural study of reconfigurable photonic networks-on-chip for multi-core processors

Photonic Networks-on-Chip (NoCs) have become a promising route to interconnect processor cores on chip multiprocessors (CMP) in a power efficient way. Although several photonic NoC proposals exist, their use is limited to the communication of large data messages due to a relatively long set-up time for the photonic channels. In this work, we evaluate a reconfigurable photonic NoC in which the topology is adapted automatically to the evolving traffic situation. This way, long photonic channel set-up times can be tolerated which makes our approach more compatible in the context of shared-memory CMPs